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Digital Integration & Timing Engineer
Apple, Inc. | |
United States, California, Irvine | |
Jul 27, 2024 | |
Summary
Posted: Apr 30, 2024 Role Number: 200549014 Come and join Apple's growing wireless silicon development team. Our Wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. This is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. We encourage you to apply if you enjoy a fast-paced and exciting environment, collaborating with people across different functional areas, and thrive during critical times. Description As a Digital Integration & Timing Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators and multiple ARM-based sub-systems. You will have the opportunity to work closely with SoC architects and IP developers to develop SoCs that meet Apple devices' power, performance, and area goals. You will help define the processes, methods, and tools for designing and implementing these large, complex SoCs. Collaboration with multi-disciplinary groups will be needed to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process. In this highly visible role, you will be at the center of the ASIC creation effort, interfacing with all disciplines, with a critical impact on getting leading-edge products out to delight millions of customers. - Full chip and block-level timing constraint and closure ownership throughout the entire project cycle (RTL, synthesis, and physical implementation). - Deploy and enhance methodology and flows related to timing constraint verification and timing closure. - Generation of consistent block and full chip timing constraints. - Support digital chip integration work and flows. - Execute low power design and physical synthesis techniques, deploying knowledge of UPF and power intent verification. - Collaborate with Chip Architecture, Design Verification, Physical Design, DFT, and power teams to achieve the tape out success on designs - generally bridging everything between the RTL and PD worlds. Key Qualifications
Education & Experience BS and 3+ years of relevant industry experience. Additional Requirements
Pay & Benefits
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. More
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